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mpq28261 21v, 3a, 500khz synchronous step-down coverter mpq28261 rev. 1.12 www.monolithicpower.com 1 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. the future of analog ic technology description the mpq28261 is a synchronous, rectified, step-down, switch-mode converter with built-in 120m ? high-side mosfet and 20m ? low-side mosfet. it offers a very compact solution to achieve a continuous 3a output current over a wide input supply range, with excellent load and line regulation. its synchronous mode operation increases its efficiency over its output current load range, and uses a fixed 500khz switching frequency. current mode operation provides a fast transient response and improves loop stabilization. full protection features include over-current protection and thermal shut down. the mpq28261 has an external ss pin to program the soft-start time and power-good signal output. the mpq28261 requires a minimal number of readily-available standard external components and is available in a space saving 3mmx4mm 14-pin qfn package. features ? wide 4.5v-to-21v operating input range ? 3a maximum continuous output current ? integrated 120m ? high-side and 20m ? low-side power mosfets ? 1% reference voltage accuracy ? up to 85% efficiency (for drops of 12v to 1.2v) ? fixed 500khz switching frequency ? external soft-start ? pg output ? ocp and thermal shutdown ? output adjustable from 0.603v to 18v ? available in a 3mm x 4mm 14-pin qfn package. applications ? dsl modems ? cable modems ? set-top boxes ? telecom all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application l1 2.8uh c3 0.1uf c1 22uf c2 47uf agnd fb sw bst in pg en 4.5v-21v mpq28261 vout 1. 2v/ 3a r10 100k vcc c4 0. 1uf r1 10k r2 10k on/off 1 9 11 7 14 6 2,3,4,5 8 rt 24k vin vcc ss c7 47nf gnd 12,13 10 efficiency vs. load current v out =1.2v efficiency (%) load current (a) 0 10 20 30 40 50 60 70 80 90 100 00.5 11.5 22.5 33.5 v in =21v v in =12v v in =4.5v
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 2 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking operation junction temperature (t j ) MPQ28261DL qfn14 (3x4mm) 28261 -40 c to +125 c * for tape & reel, add suffix ?z (e.g. MPQ28261DL?z); for rohs, compliant packaging, add suffix ?lf (e.g. MPQ28261DL?lf?z). package reference absolute maxi mum ratings (1) v in ................................................-0.3v to +23v v sw .............. -0.3v(-5v for <10ns) to (v in +0.3v) v bst ...................................................... v sw + 6v enable current i en (2) ................................. 0.2ma all other pins ..................................-0.3v to +6v continuous power dissipation (t a = 25c) (3) ............................................................. 2.6w junction temperature ...............................150c lead temperature ....................................260c storage temperature............... -65c to +150c recommended operating conditions (4) supply voltage v in ...........................4.5v to 21v output voltage v out .....................0.603v to 18v thermal resistance (5) ja jc qfn14 (3x4mm) ..................... 48 ...... 11... c/w notes: 1) exceeding these ratings may damage the device. 2) refer to the section ?configuring the en control?. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb. maximum junction temp. (t j ) ................ 125c pin 1 id 14 13 12 11 10 9 8 1 2 3 4 5 6 7 top view
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 3 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics v in = 12v, t j = -40c to +125c, unless otherwise noted. typical value is tested at t j = +25c. parameters symbol condition min typ max units supply current supply current (shutdown) i in v en = 0v 1 a supply current (quiescent, not switching) i q v en = 2v, v fb = 1v 0.45 0.7 0.9 ma mosfet hs switch on resistance (6) hs rds-on 120 m ? ls switch on resistance (6) ls rds-on 20 m ? switch leakage sw lkg v en = 0v, v sw = 0v or 12v 0.1 1 a current limit current limit i limit d=40% 4.2 5.2 a timer v fb =550mv , t j = +25c 425 500 575 khz oscillator frequency f sw v fb =550mv , t j = -40c to +125c 400 575 khz minimum on time (6) t on-min 60 ns maximum duty cycle d max v fb = 550mv 89 92 95 % reference and soft start t j = +25c 597 603 609 mv feedback voltage v fb t j = -40c to +125c 594 612 mv feedback current i fb v fb = 650mv 10 50 na soft-start current i ss v ss =0 9 12 15 a enable and uvlo en rising threshold v en_rising 1.1 1.3 1.4 v en threshold hysteresis v en_hys 0.4 v v en =2v 2 a en input current i en v en =0v 0.1 a v in under-voltage lockout threshold rising inuv vth 3.8 4.0 4.2 v v in under-voltage lockout threshold hysteresis inuv hys 880 mv power good power-good rising threshold pg vth-hi 0.9 v fb power-good falling threshold pg vth-lo 0.8 v fb power-good delay (6) pg td start up 0.25 t ss power-good leakage current i pg_leak v pg = 3.3v 200 na
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 4 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics (continued) v in = 12v, t j = -40c to +125c, unless otherwise noted. typical value is tested at t j = +25c. parameters symbol condition min typ max units vcc regulator vcc regulator v cc 5.1 v vcc load regulation v cc_reg i cc =5ma 5 % thermal protection thermal shutdown (6) t sd 150 c thermal shutdown hysteresis (6) t sd_hys 25 c notes: 6) guaranteed by design
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 5 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pin functions qfn14 (3x4mm) pin # name description 1 in supply voltage. supplies power for the inte rnal mosfet and regulator. the mpq28261 operates from a 4.5v-to-21v input rail. requires a low-esr and low-inductance capacitor (c1) to decouple the input rail. plac e the input capacitor close to this pin and connect it with wide pcb traces and multiple vias. 2,3,4,5 sw switch output. connect to the inductor and bootstrap capacitor. the internal high-side mosfet drives these pins up to the v in voltage during the pwm duty-cycle on-time. the inductor current drives the sw pins negative during the off-time. the on-resistance of the low-side switch and the internal schottky diode fixes the negative voltage. connect using wide pcb traces and multiple vias. 6 bst bootstrap. use a capacitor connected between sw and bst pins to form a floating supply across the high-side switch driver. 7 en enable. connected internally to a 1m ? pull-down resistor. en=1 to enable the mpq28261. pull en low to disable the part. 8 fb feedback. connect to the tap of an external resistor divider from the output to gnd to set the output voltage. the frequency fold -back comparator lowers the oscillator frequency when the fb voltage is below 100mv to prevent current-lim it runaway during a short circuit fault condition. place the resistor divider as close to fb pin as possible. avoid vias on the fb traces. 9 pg power-good output. active high. pin output goes to open drain of an internal switch. power-good low-to-high threshold is 90% of regulation value. there is delay from fb 90% to pg high during start up, which is about 1/4 of ss time. power-good high-to-low threshold is 80% of regulation value. 10 ss soft-start. connect an external capacitor to program the soft-start time of the switch- mode regulator. the soft-start pin connects to an internal reference source and to the non-inverting input of an error amplifier. w hen the soft-start period begins, an internal 10a current source begins charging the c apacitor. the soft-start voltage continues to rise until the voltage exceeds t he reference voltage of 0.6v. 11 vcc bias supply. typical level of around 5.1v. decouple with a 0.1 f-up-to-0.22 f capacitor. provides most of the power to the device?s internal circuits. powered by v in , and operates in the full v in range. when v in exceeds 5.1v, vcc operates at maximum output. when v in falls below 5.1v, vcc decreases. 12,13, exposed pad gnd system ground. reference ground for the regulated output voltage. requires special care for pcb layout. connect exposed pad to gnd plane for optimal thermal performance. 14 agnd signal ground. agnd is not internally conne cted to system ground?connect to system ground on pcb.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 6 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = 25c, unless otherwise noted.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 7 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = 25c, unless otherwise noted.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 8 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = 25c, unless otherwise noted. efficiency v out =1.2v load current (a) efficiency v out =1.8v load current (a) efficiency v out =2.5v load current (a) efficiency v out =3.3v load current (a) 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 3.5 v in =21v v in =12v v in =4.5v
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 9 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = 25c, unless otherwise noted.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 10 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) performance curves are tested on the evaluation board of the design example section. v in = 12v, v out = 1.2v, l = 2.8h, t a = 25c, unless otherwise noted.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 11 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. functional block diagram hs driver ls driver boost regulator oscillator current sense amplifier current limit comparator comparator on time control logic control error amplifier reference vcc regulator pg comparator 1meg 1pf 50 pf 400 k gnd sw bst fb en pg vcc in rsen vcc ss figure 1: functional block diagram
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 12 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation the mpq28261 is a high-frequency, synchronous, rectified, step-down, switch mode converter with built-in internal power mosfets. it offers a very compact solution to output a 3a continuous output current over a wide input supply range, with excellent load and line regulation. the mpq28261 operates in a fixed-frequency peak-current?control mode to regulate the output voltage. around the start of a pwm cycle, the integrated high-side power mosfet (hs- fet) turns on and remains on until its current reaches the value set by the comp voltage. when the power switch turns off, it remains off until the next clock cycle starts. if the current in the hs-fet does not reach the comp set value for 90% of one pwm period, the hs-fet will turn off. error amplifier the error amplifier compares v fb against the internal 0.6v reference (v ref ) and outputs a current proportional to the difference. the output current both charges and discharges the internal compensation network to form the comp voltage, which controls the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. internal regulator the 5v regulator powers most of the internal circuitry. this regulator takes the v in input and operates in the full v in range when v in exceeds 5.1v, the regulator outputs at its maximum level; when v in falls below 5.1v, the output decreases. the regulator requires a 0.1f ceramic capacitor for decoupling purposes. configuring the enable control the mpq28261 has a dedicated enable control pin (en): pulling this pin high or low enables or disables the ic. tie en to v in through a resistor for automatic start up. choose the values of the pull-up resistor (r up from the in pin to the en pin) and the pull-down resistor (r down from the en pin to gnd) to determine the automatic start-up voltage: up down in start down (r r ) v1.4 (v) r ? + = for example, for r up =100k ? and r down =51k ? , the v in-start is set at 4.15v. to reduce noise, add a 10nf ceramic capacitor from en to gnd. an internal zener diode on the en pin clamps the en pin voltage to prevent run away. the maximum pull up current assuming the worst case 6v for the internal zener clamp should be less than 0.2ma. therefore, when driving en with an external logic signal, use an en voltage less than 6v. when connecting en to in through a pull-up resistor or a resistive voltage divider, select a resistance that ensures a maximum pull-up current less than 0.2ma. if using a resistive voltage divider and v in exceeds 6v, then the minimum resistance for the pull-up resistor r up should meet: in up down v6v 6v 0.2ma rr ? ? with only r up (the pull-down resistor, r down , is not connected), then the vcc uvlo threshold determines v in-start, so the minimum resistor value is: in up v6v r() 0.2ma ? ? under-voltage lockout under-voltage lockout (uvlo) protects the chip from operating at insufficient supply voltages. the uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 4.0v while its falling threshold is 3.2v. power good indicator mpq28261 uses the open drain of an nmos for the power good (pg) indicator. when v fb rises above 90% of the reference voltage, pg pin is pulled up to vcc by an external resistor
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 13 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. after a delay. the pg delay time is about 1/4 of ss time. if v fb falls below 80% of the reference voltage, pg pin is pulled down to ground by an internal mosfet. external soft-start connecting a capacitor from the soft-start (ss) pin to ground adjusts the ss time. during ss initiation, an internal 12a current source charges the external capacitor. the ss pin connects internally to the non-inverting input of the error amplifier. the ss continues to charge until the voltage on the ss capacitor exceeds the 0.6v reference voltage. then the reference voltage functions as the non-inverting input of the error amplifier. the following equation estimates the ss time: ss ss 0.6v c (nf) t(ms) 12 a = table 1 lists ss times with different external capacitor values. if the output capacitor is large, use a large ss capacitor to ensure proper device start-up. table 1: soft start time vs. capacitor value t ss (ms) c ss (nf) 0.5 10 1.65 33 2.35 47 3.4 68 5 100 if the output of the mpq28261 is pre-biased to a certain voltage during startup, the ic will disable switching on both the hs-fet and ls- fet until the voltage on the internal ss capacitor exceeds the sensed output v fb , as figure 2 shows. pre-bias en ss sw fb vref takes control after ss figure 2: pre-biased soft-start over-current protection the mpq28261 has hiccup over-current limit protection for when the inductor current peak value exceeds the set current limit threshold: hiccup occurs when the output voltage drops below 70% of the reference voltage and the inductor current exceeds the current limit. this is especially useful to ensure system safety under fault conditions. the hiccup function is enabled during ss duration. i inductor v out 0a 0v current limit t figure 3: over-current behavior in hiccup figure 3 shows the hiccup function. after the hiccup occurs, the ss pin voltage goes low and mpq28261 begins ss shortly after. during the ss period, if the inductor current hits current limit and the output voltage is less than 70% of the reference, the ss voltage will go low. thermal shutdown thermal shutdown prevents the chip from operating at exceedingly high temperatures.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 14 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. when the silicon die temperature exceeds 150c, the whole chip shuts down: the hs-fet and ls-fet turn off, and the ss pin voltage goes low. when the temperature drops below the lower threshold?typically 140c?the chip restarts with an ss. floating driver and bootstrap charging the floating power mosfet driver has several features to ensure stability and functionality, such as its own uvlo protection with a rising threshold of 2.2v and a hysteresis of 150mv. an external bootstrap capacitor?regulated internally by v in through d1, m1, c4, l1 and c2 (see figure 4)?powers this driver. u1 regulates m1 to maintain a 5v bst voltage across c4 whenever (v in -v sw ) > 5v. v in v out d1 m1 bst c4 l1 sw u1 5v c2 figure 4: internal bootstrap charging circuit startup and shutdown when v in and en exceed their respective thresholds, the chip starts. the reference block starts first, generating stable reference voltages and currents, and then the internal regulator is enabled. the regulator provides a stable power supply for the rest of the device. three events can shut down the chip: en low, v in low, and thermal shutdown. in shutdown, the signaling path shuts down first to avoid triggering any faults. then the comp voltage and the internal supply rail are pulled down. the floating driver is not subject to this shutdown command.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 15 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. application information component selection output voltage selection the external resistor divider sets the output voltage (see typical application circuits on pages 1 and 17). the feedback resistor r1 also sets the bandwidth of the feedback loop in conjunction with the internal compensation capacitor. choose r1 with a value of ~10k ? . use the following equation to then estimate r2: out r1 r2 v 1 0.6v = ? use a t-type network for low values v out , as shown in figure 5. fb 8 rt r2 r1 vout figure 5: t-type network table 2 lists the recommended t-type resistors value for common output voltages. table 2: resistor selection for common v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) 1.0 10(1%) 15(1%) 24 (1%) 1.2 10(1%) 10(1%) 24 (1%) 1.8 10(1%) 4.99(1%) 24 (1%) 2.5 10(1%) 3.16(1%) 24 (1%) 3.3 10(1%) 2.20(1%) 24 (1%) 5 10(1%) 1.36(1%) 24 (1%) inductor selection for most applications, chose an inductor value between 1h and 10h with a dc current rating that is at least 25% percent higher than the maximum load current. select an inductor with a dc resistance less than 15m ? for best efficiency. use the following equation to estimate the inductance value for most designs: out in out 1 in l osc v(vv) l vif ? = where i l is the inductor ripple current. choose the inductor current to equal ~30% of the maximum load current. estimate the maximum inductor peak current as: 2 i i i l load ) max ( l + = a larger value inductor provides a higher maximum load current, and reduces the output voltage ripple. if the load is lower than the maximum load current, then a lower-value inductor will suffice and the chip then operates with higher ripple current; this allows for the use of a either a physically smaller inductor, or one with a lower dcr that can result in higher efficiency. if the inductance differs from the conditions described above, then the maximum load current will depend on the input voltage. choose an inductor value that allows for maximum output current near the switch current limit. table 3 lists some of the recommended inductors. table 3: recommended inductor part number manufacturer inductance ( h ) dcr ( m ? ) current rating ( a ) hc8lp-1r2 cooper 1.2 7.5 12.4 d104c-919as-1r8n toko 1.8 7.6 10.4 7443552280 wurth 2.8 10.5 11 fda1055-3r3m toko 3.3 7.3 11.7 7447709004 wurth 4.7 11 13
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 16 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. selecting the input capacitor the mpq28261 requires an input capacitor (c1) to supply the ac current to the step-down converter while maintaining the dc input voltage, because the input current to the step- down converter is discontinuous. use capacitors with low equivalent series resistance (esr)?such as ceramic capacitors with x5r or x7r dielectrics with low esr and small temperature coefficients. for most applications, use a 22f capacitor. since c1 absorbs the input switching current, it must withstand significant ripple current. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worse case condition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose an input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. include a small ceramic capacitor with a value of ~0.1f as close to the ic as possible when using electrolytic or tantalum capacitors. use sufficiently-large ceramic capacitors that can provide sufficient charge to prevent excessive voltage ripple. the capacitor- induced input voltage ripple can be estimated by: load out out in in sin iv v v1 fc1v v ?? = ? ?? ?? selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low- esr electrolytic capacitors to minimize the output voltage. the output voltage ripple can be estimated as: out out out esr sin s vv 1 v1r fl1 v 8fc2 ?? ?? = ? + ?? ?? ?? ?? where l1 is the inductor value and r esr is the esr value of the output capacitor. for ceramic capacitors, the capacitor dominates the impedance at the switching frequency, and subsequently dominates the output voltage ripple. for simplicity, the output voltage ripple can be estimated as: out out out 2 sin vv v1 8f l1c2 v ?? =? ?? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. subsequently, the output ripple can be approximated as: out out out esr in s vv v1r fl1 v ?? =? ?? ?? the characteristics of the output capacitor also affect the system regulation stability. the mpq28261 can be optimized for a wide range of capacitances and esr values. the maximum capacitance is 1100 f. (tested on chroma 63030, cch mode, 3a load current, soft start capacitor is 100nf, v out =5v). external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator under the following applicable conditions: z v out is 5v or 3.3v; and z duty cycle is high: d= in out v v >65% in these cases, an external bst diode is recommended from the vcc pin to bst pin, as shown in figure 6. mpq28261 sw bst c l vcc bst c out external bst diode in4148 + figure 6: add optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148 where the bst capacitor value is between 0.1 and 1 f.
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 17 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical applications ss pg en gnd vin ns c5 20k r3 10k r1 c3 1.0v/3a gnd vcc 100k r9 100k r4 15k r2 0 r6 c2a c2c vout c1a c4 24k r8 mpq28261 c1b 20 r5 l1 51 r7 47nf c7 15pf c6 c2b vcc 11 en 7 gnd 13 gnd 12 agnd 14 in 1 sw pg 9 ss 10 fb 8 bst 6 2,3,4,5 u1 sw fb en vcc vin pg ss t u o v w s fb figure 7: v out = 1v ss pg en gnd vin ns c5 20k r3 10k r1 c3 1.2v/3a gnd vcc 100k r9 100k r4 10k r2 0 r6 c2a c2c vout c1a c4 24k r8 mpq28261 c1b 20 r5 l1 51 r7 47nf c7 15pf c6 c2b vcc 11 en 7 gnd 13 gnd 12 agnd 14 in 1 sw pg 9 ss 10 fb 8 bst 6 2,3,4,5 u1 sw fb en vcc vin pg ss t u o v w s fb figure 8: v out = 1.2v ss pg en gnd vin ns c5 20k r3 10k r1 c3 3.3v/3a gnd vcc 100k r9 100k r4 2.2k r2 0 r6 c2a c2c vout c1a c4 24k r8 mpq28261 c1b 20 r5 l1 51 r7 47nf c7 15pf c6 c2b vcc 11 en 7 gnd 13 gnd 12 agnd 14 in 1 sw pg 9 ss 10 fb 8 bst 6 2,3,4,5 u1 sw fb en vcc vin pg ss t u o v w s fb figure 9: v out = 3.3v
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 18 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ss pg en gnd vin ns c5 20k r3 10k r1 c3 5.0v/3a gnd vcc 100k r9 100k r4 1.36k r2 0 r6 c2a c2c vout c1a c4 24k r8 mpq28261 c1b 20 r5 l1 51 r7 47nf c7 15pf c6 c2b vcc 11 en 7 gnd 13 gnd 12 agnd 14 in 1 sw pg 9 ss 10 fb 8 bst 6 2,3,4,5 u1 sw fb en vcc vin pg ss t u o v w s fb figure 10: v out = 5v
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter mpq28261 rev. 1.12 www.monolithicpower.com 19 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. layout recommendation 1) lay the large switching current paths (gnd, in, and sw) very close to the device using short, wide, and direct traces. minimize the loop length and area formed by these components. these components, including the inductor and output capacitor, should be placed on the same side of the circuit board, with their connections on that layer. place a localized unbroken ground plane below these components. 2) place input capacitors as close as possible to the in and gnd pins with wide pcb traces to avoid excess inductance and to prevent large spikes. add thermal vias to the bottom side to improve thermal performance. 3) place the decoupling capacitor as close as possible to the vcc and gnd pins. avoid routing the vcc trace near the noisy sw- to-bst trace. 4) place the inductor as close as possible to the sw pin. keep the switching node sw short and away from the sensitive nodes such as the feedback network. 5) place external feedback resistors next to the fb pin. make sure that there is no via on the fb trace and keep the fb trace short. route the fb trace away from the noisy sw and bst node. 6) keep the bst voltage path (bst, c3, and sw) as short as possible. keep the bst trace should away from sensitive nodes. en agnd vcc 14 12 11 10 9 8 1 2 3 4 5 6 7 pg in fb sw sw sw sw bst ss gnd c2 l1 r1 rt c1 gnd r2 c7 r10 c3 13 gnd c4 vin vout sw gnd u1 top layer gnd bottom layer figure 11: pcb layout
mpq28261 ? 21v, 3a, 500khz synchron ous step-down converter notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mpq28261 rev. 1.12 www.monolithicpower.com 20 10/10/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. package information qfn14 (3mmx4mm) side view top view 1 14 8 7 bottom view 2.90 3.10 1.65 1.75 3.90 4.10 3.25 3.35 0.50 bsc 0.20 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 1.70 0.50 0.25 recommended land pattern 2.90 note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeter max. 4) drawing conforms to jedec mo-229, variation veed-5. 5) drawing is not to scale. pin 1 id see detail a 3.30 0.70 pin 1 id option b r0.20 typ. pin 1 id option a 0.30x45 ? typ. detail a 0.35 0.45 pin 1 id index area

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